The capacitor is one of the most important elements in electronics and is routinely used in dynamic random access memory circuits (DRAM), integrated circuits (IC) and energy storage devices. Capacitors, which consist of two conductors separated by an insulator, are considered a simple electronic component. However, producing capacitors in a chip requires highly specialized process steps. Prior art approaches to mass production of chip capacitors has resulted in the development of the trench capacitor.
It is known in the art to produce trench capacitors utilizing anisotropic etching of a silicon substrate. In the conventional trench capacitor cell, the plate electrode of the storage capacitor is inside the trench, and the storage electrode is in the substrate silicon. A dielectric film is then formed over the surface of the plate electrode. Typically, the upper place electrode of the capacitor is a polysilicon layer extending into the trench, thereby forming a capacitor for use as a memory cell. However, the functionality of capacitors relies on large surface areas. Alternating the deposition of the conductor and insulator on the silicon substrate to enhance capacity and/or using high dielectric constant materials as insulators are commonly employed in the art to form large capacitors. However, multi-layer depositions are not always suitable for integrated circuits and high dielectric constant materials, such as lead zirconate titanate (PZT) are not compatible with integrated circuits. To overcome these disadvantages, one of the simple solutions known in the art is the topological enhancement of the substrate surface. Topological enhancement involves using a very large number of small, deep holes in the substrate as shown with reference to FIG. 1. These deeps holes are commonly known as trench capacitors, which refers to the capacitors built into a trench etched in the semiconductor substrate. By utilizing a trench configuration, the surface area of the capacitor can be expanded, thereby increasing the capacitance, without increasing the area of the wafer needed to form the capacitor.
Plasma etching of high aspect ratio (depth-to-width) structures in silicon, such as deep trenches and holes, is a crucial step in manufacturing trench capacitors for memory devices, and integrated components for microelectromechanical systems (MEMS). In these applications, the goal is to etch deep structures anisotropically with high etch rates and high selectivity to the mask while maintaining good uniformity across the wafer.
The method of topological enhancement utilizing a large number of small, deep holes fulfills the requirement to provide large capacitors, but creates additional inherent problems. The high aspect ratio deep holes produced by methods known in the art are difficult to clean in the production process and the resulting contamination eventually degrades the capacitor.
While the required capacitance values remain relatively small for the integration of DRAM and transistors, other applications, such as energy storage capacitors, often require large capacitance values with smaller tolerances. A large capacitor inherently requires a larger surface area. In addition, many capacitors must be ground isolated for use as non-electronic voltage converters and transducers. In an AC transformer for DC circuits, the DC energy converts low or high voltage without loss. Therefore, a micromechanical switching circuit would exhibit advantages over conventional electronic switching devices for some applications.
MEMS switching converters are known in the art. There are many benefits to a MEMS implementation for switching converters, these benefits include; no voltage loss due to p-n junction, low ohm losses, radiation resistance, ability to convert voltage up and down, prolonged operation using hermetic seal with He gas, prolonged operation using Ir contacts, ability to charge all capacitors simultaneously or based on charge transfer, only simple vibrations needed to drive the circuits, need for two power supplies for some converters. However, larger surface area and low tolerance valued capacitors are required to realize these circuits.
Prior art topological enhancement techniques utilize a very large number of small, deep holes to fabricate large surface area, low tolerance value, capacitors for use in MEMS switching converters. Silicon surface-micromachining techniques are known in the art for establishing the small, deep holes for the prior art topological capacitors. These techniques include the Bosch process, also known as deep reactive ion etching, it additional to other silicon surface-micromachining techniques. These processes rely on the anisotropic etching of silicon; which means eroding the silicon wafer at different rates in different directions, so there is more control of the shape produced. However, the high aspect ratio deep holes in the silicon substrate formed by the prior art techniques are easily oxidized using thermal oxidation, and coating the surface conductive layers in deep holes is difficult to implement. The deep holes formed by the prior art methods are also difficult to clean without leaving contaminants in the holes. These contaminants reduce the lifetime of the device. Additionally, it is difficult to trim the capacitance value of the topologically enhanced capacitor fabricated utilizing the prior art methods.
Accordingly, what is needed in the art is an improved fabrication method for topological capacitors that overcomes the problems in the prior art.